1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, and more particularly, it relates to a method of manufacturing a semiconductor device comprising a step of forming a substrate including a dislocation concentrated region and a semiconductor device comprising a substrate including a dislocation concentrated region.
2. Description of the Background Art
A method of manufacturing a substrate including a dislocation concentrated region is known in general, as disclosed in Japanese Patent Laying-Open Nos. 2002-29897 and 2003-133649, for example.
The aforementioned Japanese Patent Laying-Open No. 2002-29897 discloses a method of manufacturing a substrate formed by slicing an ingot in a direction parallel to an extensional direction of a linear threading dislocations, thereby allowing reduction in the dislocation density of a principal surface (upper surface).
The aforementioned Japanese Patent Laying-Open No. 2003-133649 discloses a method of manufacturing an ingot having a high dislocation concentrated region having a high dislocation density and a low dislocation region having a low dislocation density due to the concentrated dislocation concentrated region by concentrating the dislocations on a prescribed region when growing a substrate. Japanese Patent Laying-Open No. 2003-133649 also discloses a method of manufacturing a semiconductor device comprising steps of forming the substrate including a dislocation concentrated region extending in a direction perpendicular to a principal surface (upper surface) by slicing the aforementioned ingot in a direction perpendicular to a growth direction of the ingot, providing a semiconductor device layer on the upper surface of the substrate and providing an electrode on a lower surface of the substrate. As described in the aforementioned Japanese Patent Laying-Open No. 2003-133649, this dislocation concentrated region may invert polarity with respect to the low dislocation region. In this case, crystals are not continued on the interface between the dislocation concentrated region and the low dislocation region. Thus, the flow of a current is blocked on the dislocation concentrated region and hence the resistance of the dislocation concentrated region is conceivably increased.
In the conventional substrate described in the aforementioned Japanese Patent Laying-Open No. 2002-29897, however, the linear threading dislocations are dispersed in the overall substrate and hence the dislocation density of the principal surface (upper surface) of the substrate is disadvantageously sufficiently reduced even when the substrate is formed by slicing the ingot in a direction parallel to the extensional direction of the linear threading dislocations.
In the method of manufacturing the conventional semiconductor device described in the aforementioned Japanese Patent Laying-Open No. 2003-133649, the dislocation concentrated region extends in the direction perpendicular to the principal surface (upper surface) of the substrate and the dislocation concentrated region is present on the principal surface (upper surface) of the substrate, and hence the dislocation density of the principal surface (upper surface) of the substrate is disadvantageously increased.
In the case where a substrate is formed by slicing the ingot described in the aforementioned Japanese Patent Laying-Open No. 2003-133649 in the direction parallel to the extensional direction of the dislocation concentrated region, as in the aforementioned Japanese Patent Laying-Open No. 2002-29897, the dislocation density of the principal surface (upper surface) of the substrate can be sufficiently reduced. In this substrate, however, a side of the upper surface and a side of the lower surface of the substrate are parted by the dislocation concentrated region. When driving the semiconductor device, it is required to feed a current between the semiconductor device layer formed on the upper surface of the substrate and the electrode formed on the lower surface of the substrate through the substrate. When a current is fed in the substrate in which the aforementioned sides of the upper and lower surfaces are parted by the dislocation concentrated region, the current must pass through the dislocation concentrated region. In this case, as hereinabove described, the dislocation concentrated region has a high resistance. Thus, in the semiconductor device formed by employing this substrate, the current path of the substrate is disadvantageously increased.